It is known that in a conventional non-volatile memory, a random reading method is normally used in which word lines and bit lines are selected randomly and independently. This procedure entails reading times which are the sum of a sequence of events which can be summarized substantially as follows: propagation of the word line and bit line selection paths; precharge activity; a data evaluation interval; and propagation for data transfer to the output buffer and transition time of the buffer.
The total reading time, given by the sum of the times of the individual operations listed above, depends not only on the dimensions and architecture of the memory but also on the type of device that is present in the memory, i.e., on the technology that is used. The advantages of the conventional architecture are that it is simple (a minimal number of memory structures), it allows easy timing (because all reading cycles are equal), it provides maximum efficiency for redundancy structures, and it has significantly low consumption because the number of current-consuming circuits is kept to the lowest possible value.
However, the limitations of the conventional architecture reside in the reading speed, which is very important in large memories. One approach for improving the reading speed is the use of "page mode" reading, in which a plurality of words in parallel, for example eight, are read in a first cycle. Then, the content of the reading operation is stored in a suitable register and the portion of the register that relates to the selected word within the packet of read words is displayed externally. In this manner it is possible to scan the words contained in the packet of read words in a significantly shorter time than with random reading. However, the first reading cycle continues to be dependent on the time of a random selection.
In any case, page-mode reading is affected by the following drawbacks: a large number of reader circuits (e.g., if eight words of eight bits each are read in parallel, sixty-four sense amplifiers are required); high current absorption during parallel reading; the provision of word registers; the provision of register decoding; a reduction in the effectiveness of redundancy structures (one line at a time can be replaced with a redundant line, but in the case of multiple reading, the possibilities of line fault increase, yet there is still only one redundant line available); and the reading protocol entails a double cycle time, random or page.